107 lines
5.2 KiB
C
107 lines
5.2 KiB
C
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/*
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Copyright (c), 2001-2022, Shenshu Tech. Co., Ltd.
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*/
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#ifndef OT_COMMON_PCIV_H
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#define OT_COMMON_PCIV_H
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#include "ot_type.h"
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#include "ot_common.h"
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#include "ot_errno.h"
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#include "ot_common_video.h"
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#ifdef __cplusplus
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#if __cplusplus
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extern "C" {
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#endif
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#endif /* __cplusplus */
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#define OT_PCIV_MAX_BUF_NUM 16 /* Max pciv channel buffer number */
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#define OT_PCIV_MAX_CHIP_NUM 32 /* Max pciv chip number which can join in the system */
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#define OT_PCIV_TIMER_EXPIRES 10 /* Expires of clock interrupt */
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#define OT_PCIV_MAX_DMA_BLK 128 /* Max block number of dma task */
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#define OT_PCIV_MAX_VB_CNT 8 /* Max count of video buffer block for pci window */
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typedef struct {
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td_u32 chip_num; /* R, remote chip number */
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td_s32 chip_id[OT_PCIV_MAX_CHIP_NUM]; /* R, remote chip id */
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} ot_pciv_enum_chip;
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/* remote pciv object */
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typedef struct {
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td_s32 chip_id; /* RW, Range:host:[1, OT_PCIV_MAX_CHIP_NUM), slave:0;Remote pciv chip id */
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ot_pciv_chn pciv_chn; /* RW, Range:[0, OT_PCIV_MAX_CHN_NUM - 1]; Pciv channel id of remote pciv chip */
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} ot_pciv_remote_obj;
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/* attribution of target picture */
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typedef struct {
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td_u32 width; /* RW: Picture width of pciv channel */
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td_u32 height; /* RW: Picture height of pciv channel */
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td_u32 stride[OT_MAX_COLOR_COMPONENT]; /* RW: Picture stride of pciv channel */
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ot_video_field field; /* RW; Video frame field type of pciv channel */
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ot_pixel_format pixel_format; /* RW; Pixel format of pciv channel */
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ot_dynamic_range dynamic_range; /* RW; Dynamic range of pciv channel */
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ot_compress_mode compress_mode; /* RW; Compress mode of pciv channel */
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ot_video_format video_format; /* RW; Video format of pciv channel */
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} ot_pciv_pic_attr;
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/* attribution of pciv chn */
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typedef struct {
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ot_pciv_pic_attr pic_attr; /* RW; Picture attributes */
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td_u32 blk_size; /* RW; Video buffer size of receiver for preview */
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td_u32 blk_cnt; /* RW, Range:[1, OT_PCIV_MAX_BUF_NUM]; Number of video buffer */
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td_phys_addr_t phys_addr[OT_PCIV_MAX_BUF_NUM]; /* RW; Physical address list for video buffer */
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ot_pciv_remote_obj remote_obj; /* RW; remote pciv object */
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} ot_pciv_attr;
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/* mpp video buffer config for pci window */
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typedef struct {
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td_u32 pool_cnt; /* W, Range:[1, OT_PCIV_MAX_VB_CNT]; Total number of video buffer pool */
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td_u32 blk_size[OT_PCIV_MAX_VB_CNT]; /* W, size of video buffer pool */
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td_u32 blk_cnt[OT_PCIV_MAX_VB_CNT]; /* W, number of video buffer pool */
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} ot_pciv_window_vb_cfg;
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typedef struct {
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td_s32 chip_id; /* WW; Range:[0, OT_PCIV_MAX_CHIP_NUM) Pciv chip id */
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td_phys_addr_t np_addr; /* R; Non-prefetch window pcie base address */
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td_phys_addr_t pf_addr; /* R; Prefetch window pcie base address */
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td_phys_addr_t cfg_addr; /* R; Config window pcie base address */
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td_phys_addr_t pf_ahb_addr; /* R; Prefetch window AHB base address */
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} ot_pciv_window_base;
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typedef struct {
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td_phys_addr_t src_addr; /* W, Source address of dma task */
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td_phys_addr_t dst_addr; /* W, Destination address of dma task */
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td_u32 size; /* W, Data block size of dma task */
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} ot_pciv_dma_blk;
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typedef struct {
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td_u32 blk_cnt; /* W, Range:[1, OT_PCIV_MAX_DMA_BLK]; Total dma task number */
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td_bool is_read; /* W, Range:[0, 1]; Dam task is read or write mode */
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ot_pciv_dma_blk ATTRIBUTE *dma_blk;
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} ot_pciv_dma_task;
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#define OT_ERR_PCIV_INVALID_CHN_ID OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_INVALID_CHN_ID)
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#define OT_ERR_PCIV_ILLEGAL_PARAM OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_ILLEGAL_PARAM)
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#define OT_ERR_PCIV_EXIST OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_EXIST)
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#define OT_ERR_PCIV_UNEXIST OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_UNEXIST)
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#define OT_ERR_PCIV_NULL_PTR OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_NULL_PTR)
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#define OT_ERR_PCIV_NOT_CFG OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_NOT_CFG)
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#define OT_ERR_PCIV_NOT_SUPPORT OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_NOT_SUPPORT)
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#define OT_ERR_PCIV_NOT_PERM OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_NOT_PERM)
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#define OT_ERR_PCIV_NO_MEM OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_NO_MEM)
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#define OT_ERR_PCIV_NO_BUF OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_NO_BUF)
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#define OT_ERR_PCIV_BUF_EMPTY OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_BUF_EMPTY)
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#define OT_ERR_PCIV_BUF_FULL OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_BUF_FULL)
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#define OT_ERR_PCIV_NOT_READY OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_NOT_READY)
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#define OT_ERR_PCIV_BUSY OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_BUSY)
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#define OT_ERR_PCIV_TIMEOUT OT_DEFINE_ERR(OT_ID_PCIV, OT_ERR_LEVEL_ERROR, OT_ERR_TIMEOUT)
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#ifdef __cplusplus
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#if __cplusplus
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}
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#endif
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#endif /* __cplusplus */
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#endif /* OT_COMM_PCIV_H */
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